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The CAN-USB/2 module is an intelligent CAN interface with an ARM 7 microcontroller for the local management of CAN data. The module supports the USB 2.0 High Speed interface with data rates of 480 Mbit/s. The ISO 11898-compliant CAN interface allows a data transfer rate of a maximum of 1 Mbit/s. The CAN interface is electrically isolated from other potentials by means of a digital isolator and a DC/DC converter. Software drivers for Windows® 2K/XP/Vista/7/8 (32/64 bit) are included in delivery. Linux® kernel ≥ 2.6 is supported via Linux CAN (SocketCAN) and NTCAN wrapper library. Drivers for other operating systems are available on request. The firmware can be updated from the PC. Updates are available on the esd website. Libraries for the higher layer protocols CANopen and J1939 are available. Additional free-of-charge esd CAN tools for Windows offer efficient setup and analysis of CAN applications and networks.

The CAN-EtherCAT gateway can link CAN modules with CANopen (CiA DS 301) or layer-2 (ISO 11898-1) implementation to a realtime EtherCAT network. The EtherCAT slave functionality is in accordance with ETG Modular Device Profile No. 5000. The module can also be configured as Ethernet switch port using the EoE protocol. Firmware updates are possible via web interface (EoE) or FoE (File access-over-EtherCAT). The CAN high speed (ISO 11898-2) compatible interface allows a maximum data-transfer rate of 1 Mbit/s. The 100BASE-TX EtherCAT interface is compatible to IEEE 802.3 and runs with 100 Mbit/s. The EtherCAT as well as the CAN interface are electrically isolated. Customization on Request.

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The CPCIserial-CAN/402-4-FD comes with two or four independent CAN FD interfaces via DSUB25 according to ISO 11898-1:2015. The CAN FD interfaces are driven by the ISO 16845:2004 certified esdACC (esd advanced CAN Core) implemented in the Altera FPGA. With a higher bit rate in the data phase in combination with the increase of efficiency by a higher number of user-data bytes, CAN FD offers a higher data throughput while maintaining the benefits of Classical CAN. The board is fully backwards compatible with CAN and can also be used in Classical CAN applications. The FPGA supports bus mastering (firstparty DMA) to transfer data to the host memory. This results in a reduction of overall latency on servicing I/O transactions in particular at higher data rates and a reduced host CPU load. Due to the usage of MSI (Message Signaled Interrupts) the CPCIserial-CAN/402-4-FD can be operated for example in Hypervisor environments.

The CAN-PCI/402-2-FD is a PC board designed for the PCI bus that features two electrically isolated high-speed CAN FD interfaces according to ISO 11898-1:2015. The CAN FD interfaces are driven by the ISO 16845:2004 certified esdACC implemented in the Intel® FPGA. With a higher bit rate in the data phase in combination with the increase of efficiency by a higher number of user-data bytes, CAN FD offers a higher data throughput while maintaining the benefits of Classical CAN. The board is fully backwards compatible with CAN and can be also used in Classical CAN applications. The FPGA supports bus mastering (firstparty DMA) to transfer data to the host memory. This results in a reduction of overall latency on servicing I/O transactions in particular at higher data rates and a reduced host CPU load. Due to the usage of MSI (Message Signaled Interrupts) the CAN-PCI/402-2-FD can be operated for example in Hypervisor environments. The board provides high resolution hardware timestamps.

The CAN-M.2/402-2-FD is an M.2 Card, that features two electrically isolated CAN FD interfaces. The optional adapter CAN-PCIeMini/402-DSUB comes with a DSUB9 connector, selectable on-board CAN termination and an adapter cable. CAN-M.2/402-2-FD is fully backwards compatible with CAN and can also be used in Classical CAN applications. The independent CAN nets are driven by the ISO 16845:2004 certified esdACC (esd Advanced CAN Core) implemented in the Intel FPGA. The FPGA supports bus mastering (first-party DMA) to transfer data to the host memory. This results in a reduction of overall latency on servicing I/O transactions, in particular at higher data rates and a reduced host CPU load. Due to the usage of MSI (Message Signaled Interrupts) the CAN-M.2/402-2-FD can be operated for example in Hypervisor environments. The CAN-M.2/402-2-FD provides high resolution 64-bit hardware timestamps for CAN messages. A wide range of software support and customization is available on request.

The CAN-PCIeMini/402-2 is an add-in PCI Express Full-Mini Card, that features two electrically isolated CAN High-Speed interfaces. The PCI Express® Mini Card comes with two CAN FD interfaces. There is also a version that can be used for extended temperature range. The optional adapter CAN-PCIeMini/402-DSUB9 comes with a DSUB9 connector, selectable on board CAN termination and an adapter cable. All CAN FD versions are fully backwards compatible with CAN and can also be used in Classical CAN applications. The independent CAN nets are driven by the ISO 16845:2004 certified esdACC (esd Advanced CAN Core) implemented in the Altera FPGA. The FPGA supports bus mastering (firstparty DMA) to transfer data to the host memory. This results in a reduction of overall latency on servicing I/O transactions in particular at higher data rates and a reduced host CPU load. Due to the usage of MSI (Message Signaled Interrupts) the board can be operated for for example in Hypervisor environments.

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The CAN-PCIe/402-FD is a PC board designed for the PCIe bus that features one or two electrically isolated CAN FD interfaces according to ISO 11898-2 via DSUB9 connectors. Equipped with up to two CAN FD interfaces the board is available as low profile versions. In the CAN-PCIe/402-B4-FD version 4 CAN FD interfaces can be connected via one 37-pin DSUB connector. The CAN FD interfaces are designed according to ISO 11898-1:2015. They are driven by the ISO 16845:2004 certified esdACC (esd advanced CAN Core), implemented in the Intel FPGA. All CAN FD versions are fully backwards compatible with CAN and can also be used in Classical CAN applications. The FPGA supports bus mastering (first-party DMA) to transfer data to the host memory. This results in a reduction of overall latency on servicing I/O transactions in particular at higher data rates and a reduced host CPU load.